The present invention relates generally to dynamic random access memory (DRAM). Demands have been placed on DRAM to not only have increased memory capacity and data transfer speed, but also reduced operating and standby currents. When a system uses a DRAM, a refresh operation is necessary because of its data retention time restriction; each bit of the DRAM is stored as an amount of electrical charge in a storage capacitor that is discharged by the leakage current. Power consumption for the refresh operation increases in proportion to the memory capacity.
Japanese Patent application JP 2006-120251 provides a semiconductor memory self-refresh control method which can extend a refreshing cycle and significantly reduce the current consumption of a DRAM when a self-refresh operation is carried out. In that reference, a storage area, which is a memory cell (MC) group on the prescribed number of word lines (SWL) which are data storage objects of the whole memory arrays, is set independently of a copying area which is a memory cell group on the word lines, which are the copying destinations of all the data in the storage area. Prior to the execution of a self-refresh operation, a bit information-copying operation to one memory cell or to each of the memory cells in the copying area in the same bit line (BL) or in the same bit pair lines is executed in terms of each memory cell in the storage area as the copying source. Then, line addresses are sequentially designated in terms of the storage area as the refreshing object, and the corresponding word lines are selected and driven, and, at the same time, one or more word lines of the corresponding copying area are selected and driven to execute the self-refresh operation.